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MB85RS64A
■ STATUS REGISTER
Bit No.
7
6 to 4
3
2
1
0
Bit Name
WPEN
?
BP1
BP0
WEL
0
Function
Status Register Write Protect
This is a bit composed of nonvolatile memories (FRAM). WPEN is related
to WP input to protect writing to a status register (refer to “ ■ WRITING
PROTECT”). Writing with the WRSR command and reading with the
RDSR command are possible.
Not Used Bits
These are bits composed of nonvolatile memories, writing with the WRSR
command is possible, and “000” is written before shipment. These bits are
not used but they are read with the RDSR command.
Block Protect
This is a bit composed of nonvolatile memory (FRAM). This defines block
size for writing protect with the WRITE command (refer to “ ■ BLOCK
PROTECT”). Writing with the WRSR command and reading with the
RDSR command are possible.
Write Enable Latch
This indicates FRAM memory and status register are writable. The WREN
command is for setting, and the WRDI command is for resetting. With the
RDSR command, reading is possible but writing is not possible with the
WRSR command. WEL is reset after the following operations.
The time when power is up.
The time when the WRDI command is input.
The time when the WRSR command is input.
The time when the WRITE command is input.
This is a bit fixed to “0”.
■ OP-CODE
MB85RS64A accepts 6 kinds of command specified in op-code. Op-code is a code composed of 8 bits
shown in the table below. Do not input invalid codes other than those codes. If CS is risen while inputting
op-code, the command are not performed.
Name Description Op-code
6
WREN
WRDI
RDSR
WRSR
READ
WRITE
Set Write Enable Latch
Reset Write Enable Latch
Read Status Register
Write Status Register
Read Memory Code
Write Memory Code
0000 0110 B
0000 0100 B
0000 0101 B
0000 0001 B
0000 0011 B
0000 0010 B
DS501-00009-0v01-E
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